1. Field of the Invention
The present invention relates to a circuit for programming a non-volatile memory device.
2. Description of the Related Art
Non-volatile memory devices are commonly used for storing information that must be preserved even when a power supply feeding the memory device is off. A particular type of non-volatile memory device (such as a flash E2PROM) is programmable electrically. A flash memory is typically formed by a matrix of cells, each one consisting of a floating gate MOS transistor; the transistor is programmed injecting an electric charge into its floating gate; conversely, the transistor is erased discharging its floating gate. The electric charge in the floating gate of the transistor modifies its threshold voltage, so as to define different logic values.
The writing of a block of data on selected memory cells is accomplished through a series of program steps, each one followed by a verification of the values actually stored in the memory cells. During the program step, a voltage pulse is applied to each memory cell that needs to be programmed (in order to cause the injection of electric charge into its floating gate); the program pulse is commonly applied through a driving element (referred to as program load), which is supplied by a charge pump.
Each memory cell absorbs a significant amount of current during the program step; therefore, the number of memory cells that can be programmed at the same time is limited by the capacity of the charge pump.
A solution known in the art for improving the speed of the writing operation is that of providing multiple banks of program loads. This structure allows more program steps to be carried out in succession without any interposed verification. Therefore, the corresponding time required for switching the flash memory (between a program mode and a reading mode of operation) is saved.
However, the problem of the constraint imposed by the capacity of the charge pump remains unresolved. In other words, in the flash memories known in the art it is not possible to improve the speed of the program step without either increasing the capacity of the charge pump or reducing the current absorbed by the memory cells.
Accordingly, there exists a need for overcoming the disadvantages of the prior art as discussed above.